1. Field of the Invention
The present invention relates to a high frequency amplifier, comprising a power transistor amplifier stage in a grounded base configuration, or several such amplifier stages connected in a chain, for the amplification, to a high output power, of high frequency pulses which are each input on the emitter side of the power amplifier stage by way of an input matching network and which, having been amplified, are output at the collector side by way of an output matching network, and which are to possess a given waveform envelope.
2. Description of the Prior Art
Various disadvantages occur in known high frequency pulse amplifiers and amplifier chains of the type generally set forth above. As a result of the operational curve of power transistors in class C operation, the pulse shape of the output power comprises relatively flat leading edges and steep trailing edges, so that often it is impossible to adhere to the pulse shape conditions prescribed on the basis of the purpose of use. The more stages are interconnected to form an amplifier chain, the steeper is the gradient of the trailing edge, and the flatter is the drop of the leading edge. This disadvantage is particularly serious because, because of class C operation, only a relatively small degree of amplification can be achieved for each amplifier stage, and thus, when a higher degree of amplification is part and parcel of the system design, it is essential to use a plurality of stages. Furthermore, the operating point, is dependent not only on the operating d.c. voltage, but also on the high frequency drive power. The regulation of the output power in known high frequency pulse power amplifiers of this type by varying the operating voltage also raises problems because of the resultant oscillations which destroy the transistor and because of the inevitable changes in pulse shape. Therefore, large changes in the output power can only be made by disconnecting or connecting parallel amplifier stages, which nevertheless require the additional expense of adder networks, e.g. hybrids.